Network Intensive and Compute Intensive Hardware Acceleration: Difference between revisions
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Stage 1: Video URL will be made available in August 2014 | Stage 1: Video URL will be made available in August 2014 | ||
Stage 2: SDN and OpenFlow World Congress, 14-17 October 2014 | Stage 2: SDN and OpenFlow World Congress, 14-17 October 2014 | ||
== Abstract == | == Abstract == | ||
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'''UPDATED proposal (15/08/2014): [http://docbox.etsi.org/ISG/NFV/Closed_WGs/PER/05-CONTRIBUTIONS/2014//NFVPER(14)000078r6_PoC_Proposal_-_Network_Intensive_and_Compute_Intensive_Hardw.docx NFVPER(14)000078r6_PoC_Proposal_-_Network_Intensive_and_Compute_Intensive_Hardw.docx]''' | '''UPDATED proposal (15/08/2014): [http://docbox.etsi.org/ISG/NFV/Closed_WGs/PER/05-CONTRIBUTIONS/2014//NFVPER(14)000078r6_PoC_Proposal_-_Network_Intensive_and_Compute_Intensive_Hardw.docx NFVPER(14)000078r6_PoC_Proposal_-_Network_Intensive_and_Compute_Intensive_Hardw.docx]''' | ||
== PoC Report == | |||
Interim Report (18/11/2014): [http://docbox.etsi.org/ISG/NFV/Closed_WGs/PER/05-CONTRIBUTIONS/2014/NFVPER(14)000111__PoC_21_Interim_Report_-_Network_Intensive_and_Compute_Inten.docx NFVPER(14)000111__PoC_21_Interim_Report_-_Network_Intensive_and_Compute_Inten.docx] | |||
'''Final PoC Report (24/07/2015):''' [https://docbox.etsi.org/ISG/NFV/TST/05-CONTRIBUTIONS/2015//NFVTST(15)000111r1_PoC_21__Network_Intensive_and_Compute_Intensive_Hardware_Acc.docx NFVTST(15)000111r1_PoC_21__Network_Intensive_and_Compute_Intensive_Hardware_Acc.docx] | |||
== Hot Topics == | |||
This PoC has <span style="color:red;">'''CONTRIBUTED to Hot Topic: [[Hot Topics|HT#1 (EVE) Use of SDN in NFV architecture]] ''' </span> | |||
Latest revision as of 10:30, 26 July 2015
PoC Team
BT
Huawei
EZChip
AMD
Tilera
Altera
Broadcom
EANTC
Ixia
Main Contact
Evelyne Roch, Huawei evelyne.roch@huawei.com
PoC Demo
Stage 1: Video URL will be made available in August 2014
Stage 2: SDN and OpenFlow World Congress, 14-17 October 2014
Abstract
The main purposes of this PoC are to demonstrate the benefits of Hardware Acceleration in NFV environments and to identify detailed requirements for a Hardware Abstraction Layer to enable portability across different Hardware Acceleration platforms.
The benefits of Hardware Acceleration include an increase in performance, better resource utilization and cost reduction for some Network Functions. This PoC accelerates the following functions as examples of functions that can benefit from Hardware Acceleration: Load Balancing, IKE (Internet Key Exchange), Encryption and Video Transcoding.
This PoC consists of multiple stages demonstrating increasing levels of complexity of integration of Hardware Acceleration solutions from different vendors demonstrating Dynamic Optimization of Packet Flow Routing for Network Intensive Functions to dynamic Service Chaining. The PoC can form the basis for future Open Source and Standardization work in the definition of a Hardware Abstraction Layer.
PoC Proposal
NFVPER(14)000078_PoC_Proposal_-_Network_Intensive_and_Compute_Intensive_Hardw.docx
UPDATED proposal (15/08/2014): NFVPER(14)000078r6_PoC_Proposal_-_Network_Intensive_and_Compute_Intensive_Hardw.docx
PoC Report
Interim Report (18/11/2014): NFVPER(14)000111__PoC_21_Interim_Report_-_Network_Intensive_and_Compute_Inten.docx
Final PoC Report (24/07/2015): NFVTST(15)000111r1_PoC_21__Network_Intensive_and_Compute_Intensive_Hardware_Acc.docx
Hot Topics
This PoC has CONTRIBUTED to Hot Topic: HT#1 (EVE) Use of SDN in NFV architecture